Modeling MOSFET Threshold Voltage in TSMC 0.18um CMOS for Integrated Circuits Design

Document Type : Original Article

Authors

• Amir Ebrahimi ¹
• Habib Adarang ²

¹ School of Engineering, RMIT University, Melbourne, Australia

² Department of Electrical Engineering, Faculty of Engineering and Technology, University of Mazandaran, Babolsar. Iran

Abstract

Keywords

• Threshold voltage (VTH)
• Levenberg-Marquardt
• Short Channel Effect
• Drain-Induced Barrier Lowering (DIBL)

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